Doping method and semiconductor device using the same

ABSTRACT

The present invention achieves a shallow junction of a source and a drain, and provides a doping method which makes device properties reproducible and a semiconductor device fabricated using the method. In the present invention, doping for the semiconductor is conducted by attaching a molecular species with a higher electron affinity or lower ionization energy out of fullerene derivatives or metallocenes to the semiconductor surface to induce charge transfer from the molecule to the semiconductor.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a doping method in a junction formationprocess, in particular, a shallow junction formation process, of asemiconductor device, and a semiconductor device using the same.

2. Description of the Related Art

For metal oxide semiconductor field effect transistors (MOSFET), highperformance has been achieved by microfabrication in view of processingsize. However, due to the shortened channel length, phenomena calledshort channel effect and hot carrier phenomena have arisen and preventedimprovement of the performance of the device.

To avoid such negative impact, it is necessary to make the source/drainjunction shallow. In addition, to increase the current drivability oftransistors, the resistance (layer resistance) of the doping layer ofthe source and the drain needs to be as low as possible. InternationalTechnology Roadmap for Semiconductors (ITRS 2002 Update) requiresrealization of a source/drain junction depth of 10 nm and a sheetresistance of 360 Ω by the year 2007.

Conventionally, as a technique for forming a shallow source/drainjunction, a combination of low speed ion implantation and rapid thermalannealing process (A. Ono et al.: 2000 Symposium on VLSI TechnologyDigest of Technical Papers, p. 14), plasma doping (Bunji Mizuno, OyoButuri, Vol.70, No.12, p. 1458–1462, 2001), elevated source/drain due toselective epitaxial growth (Denshi Zairyo (Electronic Materials andParts), November sppl. and Vol./2002, Guide Book of VLSI Production andTesting Equipment, p. 95–99, 2001), solid phase diffusion (JapanesePatent Application Laid-Open No. 8-167658) and laser doping (K.Shibahara et al.: 2001 Solid State Devices and Materials, p. 236).

SUMMARY OF THE INVENTION

The junction depth obtained by the conventional techniques as describedabove is 20 nm at the deepest, but to correspond with furthermicrofabrication of devices, a technique for doping at a junction depthof not more than 10 nm is required. Since the above-mentioned methodsinclude stochastic processes such as ion implantation and heattreatment, there have been great difficulties in achieving a shallowjunction free of inequality.

The present invention can achieve a shallow source/drain junction, andan object of the present invention is to provide a doping method whichmakes device properties reproducible and a semiconductor device usingthe same.

In order to achieve the above-mentioned object, doping for semiconductoris conducted by attaching a molecular species with a higher electronaffinity or lower ionization energy out of fullerene derivatives ormetallocenes to the semiconductor surface to induce charge transfer fromthe molecules to the semiconductor.

According to the present invention, a shallow source/drain junction canbe achieved and a doping method which makes device propertiesreproducible and a semiconductor device using the same can be provided.

The disclosure of Japanese Patent Application No. 2003-414550 filed Dec.12, 2003 including specification, drawings and claims is incorporatedherein by reference in its entirety.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic view illustrating charge transfer from carriersupplying molecules to the semiconductor surface;

FIG. 2 is a view illustrating a structure of a sample;

FIG. 3 is a graph showing changes in the current-voltage characteristicsdue to the deposition of C₆₀F₃₆;

FIG. 4 is a view illustrating a 3-terminal structure made of Sifabricated on SOI;

FIG. 5 is a graph showing current-voltage characteristics of the sampleof FIG. 4 before and after the deposition of C₆₀F₃₆;

FIG. 6 is a graph showing the sheet resistance and the amount of inducedelectrons upon deposition of decamethylnickelocene;

FIG. 7 is a view illustrating decamethylnickelocene;

FIG. 8 is a view illustrating a process for producing a MOSFET; and

FIG. 9 is a view illustrating a process for fabricating a memory device.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention relates to formation of an extremely thin, highconcentration carrier conducting layer under the surface of asemiconductor by charge transfer from carrier supplying molecules to thesemiconductor surface by attaching, to the surface of the semiconductor,fullerene derivative molecules or metallocene molecules which serve as acarrier supplier.

In the formation of high concentration carrier conducting layer, thetype of carrier to be introduced is determined according to the physicalrelation between the energy level of the molecules which are carriersuppliers attached to the semiconductor surface and the energy level onthe semiconductor surface. As shown in FIG. 1(A), in the case ofmolecules having sufficiently low ionization energy, the energy level atthe highest occupied molecular orbital (HOMO) of the molecules attachedto the semiconductor surface is higher than that at the lower end of theconduction band of the semiconductor surface, and so the electrons aretransferred to the semiconductor side from the molecules, inducingnegative charge on the semiconductor surface, whereby the molecules arecharged positive. Accordingly, an extremely thin conducting layer isformed in the vicinity of the semiconductor surface with electrons ascarriers.

On the other hand, in the case of molecules having a sufficiently highelectron affinity, the energy level at the lowest unoccupied molecularorbital (LUMO) of the molecules or clusters attached to thesemiconductor surface is lower than that at the upper end of the valenceband of the semiconductor surface, and so electrons are transferred tothe molecules from the semiconductor side, inducing holes in thevicinity of the semiconductor surface, as shown in FIG. 1(B).Accordingly, an extremely thin conducting layer is formed in thevicinity of the semiconductor surface with holes as carriers.

In the present invention, the inventors used fullerene derivatives andmetallocenes as the molecules to be attached. The reason therefor isthat the electron affinity and the ionization energy can be differentaccording to the kind of molecules to be added to fullerene in the caseof the fullerene derivatives, and the kind of metal to be sandwiched orthe kind of the side chain of the aromatic molecules above and below inthe case of metallocene. Metallocene is a molecule shaped like asandwich containing a metal atom between aromatic rings as shown in FIG.7. Nickelocene is a molecule in which the sandwiched metal atom isnickel and decamethylnickelocene is a molecule in which the aromaticrings are 5-membered to which 10 methyl groups are bonded.

For example, a derivative in which fluorine is added to C₆₀ can be usedfor the doping of holes as the electron affinity becomes high. Inparticular, C₆₀F₃₆ and C₆₀F₄₈ are preferable because they have a highelectron affinity of about 4 eV (for example, the electron affinity ofF₂ which is considered to have an extremely high electron affinity is3.0 eV). On the other hand, as nickelocene has low ionization energy, itcan be used for the doping of electrons. In particular,decamethylnickelocene is preferable because it has low ionization energyof about 4.4 eV (for example, the ionization energy of Na which isconsidered to have low ionization energy is 5.1 eV).

In the junction formed according to a conventional doping method,carrier suppliers are present in the carrier conducting layer, andtherefore the mobility is decreased due to scattering and the resistanceis increased. On the contrary, since the present invention achievesdoping only by attaching molecules to the semiconductor surface, thecarriers in the conducting layer are less likely to be scattered by thecarrier supplier. In addition, when molecules are attached densely tothe semiconductor surface, the area density is fixed based on the sizeof the molecule, whereby a doping profile with low statisticalfluctuation can be achieved. Because it is only necessary to attachmolecules to the semiconductor surface, the characteristic is thatoccurrence of defect upon the processes such as ion implantation isextremely low. Examples of the attaching method include a vacuumdeposition method, deposition by ion beam and spin coating.

The molecules which serve as carrier suppliers need not to be attachedto the semiconductor surface directly. The above principle is effectiveeven when the molecules are attached interposing a suitable thindielectric film. For example, in the case of a silicon substrate, chargetransfer can be induced by forming a thin thermal oxide film andadsorbing molecules thereto. At this stage, because the oxide filmformed on the surface has an effect of reducing the trap level of thesurface, the efficiency of doping improves. In addition, the surfacetrap level can be reduced by depositing an insulating material afterattaching carrier supplier molecules. This case also has an advantagethat the carrier supplying molecules are protected by the surroundinginsulating material.

When the carrier supplier molecules and the semiconductor substrate areisolated by a dielectric, the carrier transfer is caused by tunnelingthrough the dielectric. The probability of the carrier transfer can beincreased by bringing the electron to the excitation state byirradiating the semiconductor substrate and the molecules with light. Inother words, photo irradiation facilitates the carrier transfer from themolecules to the semiconductor substrate and even after the light isturned off, the condition is maintained because the molecules and thesemiconductor are separated by a dielectric. Thus, the device can beused as a memory.

In addition, when carrier supplier molecules are embedded in thedielectric and a gate electrode is formed thereon, the charging state ofthe molecules can be controlled by applying electric voltage to thesemiconductor substrate, and so the device can be used as a memory.

Examples according to the present invention are described in thefollowing.

EXAMPLE 1

Hole doping was investigated by using C₆₀F₃₆ having an electron affinityof about 4 eV. The structure of the used sample is one in which a p⁺source/drain region is formed on a n-type Si substrate and an oxide filmof about 2 nm is formed on the part between the source and the drain(channel part) of the Si substrate surface as shown in FIG. 2. Thecurrent-voltage characteristics before and after depositing about 2 nmof C₆₀F₃₆ on the oxide film surface were measured. The measurement wasconducted in vacuum.

As the graph of FIG. 3 shows, the resistance exhibited a triple-digitdecrease due to the deposition of C₆₀F₃₆. When irradiated with lightfrom a mercury lamp, charge transfer from C₆₀F₃₆ to the substrate waspromoted and the resistance exhibited another single-digit decreaseafter turning off of the light. The final sheet resistance was 10 kΩ.The above results show that an inversion layer was formed on the n-typechannel region by C₆₀F₃₆ to form a conducting layer with holes.

For comparison, when C₆₀ was deposited on the channel region of a samplein which p⁺ source/drain was formed on a n-type Si substrate and anoxide film of about 2 nm was formed on the part between the source andthe drain (channel part) of the Si substrate surface as described above,the resistance exhibited a single-digit increase. In addition, when C₆₀was deposited on a sample in which n⁺ source/drain is formed on a p-typeSi substrate in the same manner, the resistance also increased. This isbecause the electron affinity of C₆₀ of 2.65 eV is not sufficiently highand therefore level arises in the energy gap and carriers are trappedboth in p-type and n-type.

From the foregoing, it has been proved that addition of fluorine to C₆₀is effective for inducing holes in Si.

In addition, it has been found that since the resistance is decreased bylight irradiation and the state is maintained after turning off of thelight, the above structure can be used as a memory.

EXAMPLE 2

p/n junction was formed using C₆₀F₃₆. FIG. 4 illustrates a structure ofa sample of 3 terminals fabricated on SOI (Silicon on Insulator).

(A) indicates the condition before the deposition of C₆₀F₃₆, while (B)indicates the condition after the deposition of C₆₀F₃₆. Since thecentral part is converted to p-type from n-type after the deposition ofC₆₀F₃₆, the channel in which current flows undergoes changes. The arrowsshow the channel of current flow. The n-type SOI substrate has a regionfor deposition of n at the center, from which three terminals of two n⁺terminals and one p⁺ terminal are extended. On the surface of thedeposition region, one of the n⁺ terminals is connected to the powersource and the other terminals are led to the ground. The I–Vcharacteristics before the deposition of C₆₀F₃₆ are ohmic because of theflow from the n⁺ terminal to the n⁺ terminal as shown in FIG. 5. WhenC₆₀F₃₆ is deposited only on the center part in a thickness of about 2nm, the deposited portion is converted to p-type and current begins toflow from the n⁺ terminal to the p⁺ terminal, assuming diode propertiesas shown in FIG. 5. From the foregoing, it has been proved that ajunction was formed by the deposition of C₆₀F₃₆.

EXAMPLE 3

When decamethylnickelocene was deposited on an n-type Si substratehaving an oxide film of 2 nm on the surface, the resistance decreased asshown in FIG. 6. The sheet resistance decreased to 3.5 kΩ/sq from theinitial resistance of 16 kΩ/sq at a deposition of 1×10¹³ cm⁻². Thissuggests that about 4×10¹² cm⁻² of electrons were induced to the Sisubstrate by depositing decamethylnickelocene.

EXAMPLE 4

FIG. 8 is a view illustrating a process for producing a MOSFET. An MOStransistor was prepared according to the process shown in the figure. InFIG. 8( a), a 2-nm thick oxide film was formed on the surface of a Sisubstrate by thermal oxidation at 850° C. under dry oxygen as a gatedielectric. Polycrystalline Si was deposited thereon and the deposit wasprocessed into a gate having a length of 1 μm by photolithography. Atthis stage, 1×10¹⁵/cm² of boron having 60 keV was implanted by ionimplantation, and annealing for activation was conducted in a tubefurnace under inert gas atmosphere at 900° C. for 10 min to form asource/drain pair (FIG. 8( b)). The distance between the gate and thesource (drain) is 1 μm. Here, 1 nm of C₆₀F₃₆ was deposited on thesurface of the device by vacuum deposition (FIG. 8( c)). As C₆₀F₃₆induces holes in the silicon substrate, a source/drain extension regionis formed between the gate and the source/drain. Then a silicon nitridefilm was deposited as a protective film (FIG. 8( d)). A window wasopened by removing part of the silicon nitride film above thesource/drain by dry etching and an aluminum electrode was deposited tocomplete a transistor (FIG. 8( e)). The prepared transistor exhibitedexcellent properties.

EXAMPLE 5

FIG. 9 is a view illustrating a process for fabricating a memory device.A memory device was fabricated according to the process shown in thefigure. In FIG. 9( a), a 2 nm thick oxide film was formed on the surfaceof a Si substrate by thermal oxidation at 850° C. under dry oxygen as agate dielectric. At this stage, 1×10¹⁵/cm² of boron having 60 keV wasimplanted by an ion implantation method and annealing for activation wasconducted in a tube furnace under inert gas atmosphere at 900° C. for 10min to form source/drain (FIG. 9( b)). The distance of the source/drainis 10 μm. Here, 1 nm of C₆₀F₃₆ was deposited on the surface of thedevice by vacuum deposition (FIG. 9( c)). Then a silicon nitride filmwas deposited as a protective film (FIG. 9( d)) to form a gate electrodemade of polysilicon between the source and the drain (FIG. 9( e)). Awindow was opened by removing part of the silicon nitride film above thesource/drain by dry etching and an aluminum electrode was deposited tocomplete a memory device (FIG. 9( f)).

When negative voltage was applied to the gate electrode, the resistancebetween the source/drain was decreased and the decreased resistance wasmaintained even after the negative voltage was turned off. When positivevoltage was applied, the resistance returned to a high value. From this,the device having a structure shown in FIG. 9 was found to operate as amemory device.

Although only some exemplary embodiments of this invention have beendescribed in detail above, those skilled in the art will readilyappreciated that many modifications are possible in the exemplaryembodiments without materially departing from the novel teachings andadvantages of this invention. Accordingly, all such modifications areintended to be included within the scope of this invention.

1. A doping method comprising attaching a metallocene or a fullerenederivative to a semiconductor surface directly or indirectly, andgenerating carriers in the vicinity of the semiconductor surface bycharge transfer from the metallocene or the fullerene derivative to thesemiconductor surface, wherein a thin dielectric film is formed on thesemiconductor surface and wherein the metallocene or the fullerenederivative is attached via the thin dielectric film.
 2. The dopingmethod according to claim 1, wherein a dielectric film is depositedafter attaching the metallocene or the fullerene derivative to thesemiconductor surface or to the thin dielectric film.
 3. The dopingmethod according to claim 1, wherein the attached fullerene derivativeis a fluorinated C₆₀ molecule.
 4. The doping method according to claim3, wherein the fluorinated fullerene is C₆₀ F₃₆ or C₆₀ F₄₈.
 5. Thedoping method according to claim 1, wherein the semiconductor is made ofsilicon (Si).
 6. A doping method comprising attaching a metallocene or afullerene derivative to a semiconductor surface directly or indirectly,and generating carriers in the vicinity of the semiconductor surface bycharge transfer from the metallocene or the fullerene derivative to thesemiconductor surface, wherein a dielectric film is deposited afterattaching the metallocene or the fullerene derivative to thesemiconductor surface or to the thin film.
 7. A doping method comprisingattaching a metallocene or a fullerene derivative to a semiconductorsurface directly or indirectly, and generating carriers in the vicinityof the semiconductor surface by charge transfer from the metallocene orthe fullerene derivative to the semiconductor surface, wherein theattached metallocene is nickelocene.
 8. The doping method according toclaim 7, wherein the attached nickelocene is decamethylnickelocene.
 9. Asemiconductor device, wherein the device is produced by attaching ametallocene or a fullerene derivative to a semiconductor surfacedirectly or indirectly and generating carriers in the vicinity of thesemiconductor surface by charge transfer from the metallocene or thefullerene derivative to the semiconductor surface, wherein the device isproduced by forming a thin dielectric film on the semiconductor surfaceand attaching the metallocene or the fullerene derivative to the surfaceof the dielectric film to generate carriers in the vicinity of thesemiconductor surface by charge transfer from the metallocene or thefullerene derivative to the semiconductor surface.
 10. The semiconductordevice according to claim 9, wherein the semiconductor is made ofsilicon (Si).
 11. The semiconductor device according to claim 9, whereinthe device is produced by generating carriers via photo irradiationafter attaching the metallocene or the fullerene derivative.
 12. Thesemiconductor device according to claim 9, wherein a dielectric film isdeposited and a gate electrode is formed thereon after attaching themetallocene or the fullerene derivative.
 13. A semiconductor device,wherein the device is produced by attaching a metallocene or a fullerenederivative to a semiconductor surface directly or indirectly andgenerating carriers in the vicinity of the semiconductor surface bycharge transfer from the metallocene or the fullerene derivative to thesemiconductor surface, wherein the attached fullerene derivative is afluorinated C₆₀ molecule.
 14. The semiconductor device according toclaim 13, wherein the fluorinated fullerene is C₆₀F₃₆ or C₆₀F₄₈.
 15. Asemiconductor device, wherein the device is produced by attaching ametallocene or a fullerene derivative to a semiconductor surfacedirectly or indirectly and generating carriers in the vicinity of thesemiconductor surface by charge transfer from the metallocene or thefullerene derivative to the semiconductor surface the semiconductordevice according to claim 10, wherein the attached metallocene isnickelocene.
 16. The semiconductor device according to claim 15, whereinthe attached nickelocene is decamethylnickelocene.
 17. A semiconductordevice, wherein the device is produced by attaching a metallocene or afullerene derivative to a semiconductor surface directly or indirectlyand generating carriers in the vicinity of the semiconductor surface bycharge transfer from the metallocene or the fullerene derivative to thesemiconductor surface, wherein the device is produced by generatingcarriers via photo irradiation after attaching the metallocene or thefullerene derivative.
 18. A semiconductor device, wherein the device isproduced by attaching a metallocene or a fullerene derivative to asemiconductor surface directly or indirectly and generating carriers inthe vicinity of the semiconductor surface by charge transfer from themetallocene or the fullerene derivative to the semiconductor surface,wherein a dielectric film is deposited and a gate electrode is furtherformed thereon after attaching the metallocene or the fullerenederivative.